Switch mode power converter s that are particularly useful in low-power electronic devices, convert an input power source from a first voltage level to a second voltage level. A typical switch mode power converter (SMPC) is a DC-to-DC switch mode converter that converts the first voltage level to the second voltage level by temporarily storing energy in a magnetic component (e.g., an inductor or transformer) or a capacitor circuit (e.g., switched capacitor circuit) and then releasing the energy, at a different voltage, from the magnetic component or capacitor circuit to a load. FIG. 1 is a schematic of a buck SMPC 5 of the prior art that illustrates the basic structure of a basic SMPC. The schematic of a buck SMPC 5 has three sections, a control section 10, a switch section 15, and a filter section 20. The control section has an error amplifier 25 that receives a reference voltage VREF indicative of the amplitude of the output voltage VOUT. The output error voltage VEA of the error amplifier 25 is applied to an out-of-phase input (−) of a comparator 30. The in-phase input (+) of the comparator 30 receives a ramp voltage signal VRAMP from a ramp generator 35. The output of the comparator 30 is a digital logic signal indicating with the error voltage VEA is greater than the reference voltage VREF. The output digital signal of the comparator 30 is applied to the reset input of the set-reset latch 40. The reset input (R) deactivates the data output Q to a logical zero state and activates the data output Q to a logical one state. The set input (S) of the set-reset latch 40 receives a clock signal VSET. The set input (S) activates the data output (Q) to a logical one state and deactivates the data output Q to a logical zero state.
The switching transistors MP and MN form the switching section 15. The input supply voltage VIN of the SMPC 5 is applied to the source of the switching transistor MP. The source of the switching transistor MN is connected to the ground reference voltage source. The drains of the switching transistors MP and MN are connected together and to a first terminal of the inductor L. The second terminal of the inductor L is connected to a first terminal of the load capacitor CL and a first input of the electronic load circuit 50. A second terminal of the load capacitor and and the load is connected to the ground reference voltage source.
The data output (Q) is applied to the gate of the p-type switching transistor MP and the data output Q is applied to the gate of the n-type switching transistor MN. The control section 10 forms a pulse width modulator for controlling the switching time of the switching transistors MP and MN. In turn, the switching transistors MP and MN control the flow of the inductor current IL flowing through the inductor L to the load capacitor CL and the load 50 at the output of the buck SMPC 5. The inductor L and the capacitor CL form the filter section 20 of the buck SMPC 5. The filter section 20 removes any of the switching noise at the output voltage VOUT of the buck SMPC 5.
Modern integrated circuits are requiring higher current and lower voltage. A multiphase SMPC responds to this requirement. Multiphase SMPCs employ two or more identical, interleaved converters connected so that their output is a summation of the outputs of the each phase of the multiphase SMPC. Each of the multiple phases historically have a clock signal that operates at a common switching frequency. However, the clock of each phase is shifted so that conversion switching occurs at regular intervals controlled by a common control circuit. The control circuit staggers the switching time of each converter so that the phase angle between each multiphase SMPC switching is 360°/n, where n is the number of multiphase SMPC phases. The outputs of the multiphase SMPCs are paralleled so that the effective output ripple frequency is n×f, where f is the operating frequency of each converter. This provides better dynamic performance and significantly less decoupling capacitance than a single phase SMPC providing equivalent current and voltage.
The multiphase approach to the design of the SMPCs also offers packaging advantages. Each converter delivers 1/n of the total output power, reducing the physical size and inductance of the inductor employed in each phase of the multiphase SMPC. Also, the switching transistors in each phase only need to handle 1/n of the total power. This spreads the internal power dissipation over multiple power devices, thus simplifying the heat management of the multiphase SMPC.
Using the same type of inductors for each phase of multiphase SMPCs maximizes the performance of all of the phases in terms of better transient response, smaller ripple and less harmonic noise. This may not be the best solution in terms of efficiency, in particular in instances where higher efficiency over a wide range of load conditions are required. With smaller inductances of multiphase SMPCs having identical components for each phase, the smaller value inductors give provide good transient response. However, at light load conditions, the smaller inductors have higher AC losses. Further, if one or more of the phases of the multiphase SMPC has a larger value inductor, it will have low AC losses that provide higher efficiency at light load condition.